1. Field of the Invention
The present invention relates to data transmission, and more specifically to virtual address to physical address translation.
2. Description of the Related Art
In the computing environment, data must be transmitted between different computer components as well as between computers in a network structure. Often, data used by a central processing unit (CPU) within a computer are allocated virtual addresses (VA) for ease and flexibility of use and processing. In one example, data may have virtual addresses corresponding to physical memory addresses (PA) located within a random access memory (RAM). Unfortunately, during a data transfer to a location outside of the CPU, such as a data transmission to another computer over a network using an entity such as, for example, an input/output card, the input/output card needs the physical address of the data that is to be transferred. But since such an entity generally does not have access to hardware VA to PA translation, translating a VA to PA generally takes a substantial period of time. This can result in a great impact on performance especially when the VA to PA translation has to be repeated many times to transfer large quantities of data.
Accordingly, what is needed is an apparatus and a method to increase the speed of VA to PA translation.